1. Field of the Invention
The present invention relates generally to a method for encapsulating lead frame based packages. More specifically, embodiments of the invention pertain to a high density molded lead frame and a method for manufacturing the same.
2. Background Art
Recently developed packages for integrated circuit (IC) die or chips include the quad flat, no-lead (QFN) package and the dual flat, no-lead (DFN) package, which is essentially the same as a QFN package except it includes leads on two sides of the package instead of four. QFN and DFN packages are sometimes referred to within the semiconductor industry as micro lead frame (MLF) packages or a molded leadframe packages (MLP). FIG. 1 is a cross-sectional view of a simplified MLP 10. MLP 10 includes an IC die 12 attached to a die pad portion 14 of a lead frame by an adhesive 13. Bonding pads 18 are formed on the top of IC die 12 and connected to leads 16 of the leadframe by wirebonds 19. An encapsulant material 20 covers the package including IC die 12, wirebonds 19 and the upper surfaces of die pad 14 and leads 16. Die pad 14 and leads 16 are exposed on the bottom of the package thereby facilitating heat dissipation from IC 12 external to package 10 and decreasing the overall thickness of the package. A half-etched portion 17 is formed on the sidewall surface of die pad 14 and leads 16 to better mechanically secure the die pad and leads to the encapsulant material, which flows underneath half-etched portion 17.
MLP 10 is typically one of many IC packages formed in a matrix pattern on a lead frame strip, and MLP 10 is typically encapsulated using one of two different techniques, which can be referred to as block molding or matrix molding. Packages encapsulated using a block molding technique are typically separated from the lead frame strip using a sawing process while packages encapsulated using a matrix molding technique are typically separated from the lead frame using a punch process. To accommodate the different types of encapsulation and singulation processes, lead frame strips are specifically designed for one or the other.
One example of a suitable lead frame strip 30 that can be used for a block encapsulation process is shown in FIG. 2. Strip 30 includes an outer frame 32 having a plurality of positioning holes 34 formed thereon and a plurality of vertical and horizontal connecting bars 36 and 38, respectively, that form a plurality of inner frames 40 which are shown in more detail in FIG. 3, which is an expanded view of portion A in FIG. 2. Each inner frame 40 shown in FIG. 3 includes a die pad 14 and a plurality of leads 16 that surround the die pad. Die pad 14 is connected to the lead frame by tie bars, which are not shown for simplicity, and each set of leads 16 extends from one of the horizontal or vertical connecting bars towards its respective die pad 14.
Lead frame strip 30 includes four 9×9 matrices of inner frames 40, each of which will be made into an IC package to provide 81 separate IC packages per block. In a block encapsulation method, each matrix is encapsulated within a single block of encapsulation material and then singulated using a sawn technique. FIG. 4 shows a lead frame strip 30 having two encapsulation blocks 31a and 31b formed over matrices of IC packages within the area covered by blocks 31a and 31b. Also shown in FIG. 4 are two 9×9 matrices (31c and 31d) of inner frames 40 that have not yet been covered by encapsulation blocks. Each of blocks 31a–31d provides 81 separate IC packages after the encapsulation, singulation and additional steps of the package formation process are completed. A plurality of stress relief holes 42 are shown between each of blocks 31a–31d that help ensure accurate singulation during the sawing process.
An example of a lead frame 50 suitable for a matrix type molding process is shown in FIGS. 5 and 6. A matrix mold encapsulation process encapsulates each integrated circuit package within a separate cavity as opposed to using a single cavity to encapsulate an entire matrix as done in a block molding method. Matrix molding techniques are typically used when packages are separated from the lead frame strip using a punch singulation technique as opposed to a sawing technique. FIG. 5 shows an example of a portion of a lead frame strip 50 that can be used for a matrix molding encapsulation technique where each individual IC package is encased within a package cavity 54 of a mold. As shown in FIG. 5, space needs to be saved on the lead frame strip for runners 52 to be placed between the individual IC packages. During a standard transfer molding encapsulation process, encapsulant is melted and flows down the runners by the force of gravity. From the runners, the encapsulant then flows into gates 53 that lead to a cavity 54, which defines the shape of the plastic resin that makes up the bulk of each IC package. The encapsulant fills the cavity within the mold and, after the encapsulant cools and hardens, the mold can be removed leaving behind a partially formed package having encapsulant material covering the IC chip, wire bonds and leads (except for the portion used to make contact to an external device/board).
One problem with the well known transfer molding process described with respect to FIG. 5 is that providing space for the runners reduces the density of the packages that can be formed for a given size lead frame strip thus contributing to an overall cost increase in the MLP manufacturing process. Each runner 52 travels the length of the connecting bar it is positioned over and thus needs to be wide enough to allow for a sufficient amount of encapsulant to travel down the runner and fill the mold cavity for each package connected to the runner in a reasonable amount of time. This issue can be easily seen in FIG. 6, which is a simplified top plan view of the lead frame strip 50 that was only partially shown in FIG. 5. As shown in FIG. 6, lead frame strip 50 includes alternating thin vertical connecting bars 55 and thicker vertical connecting bars 56. Runners 52 are positioned over the thicker vertical connecting bars 56 (note FIG. 5 is rotated 90 degrees with respect to FIG. 6). The runner along connecting bar 56a provides encapsulant to the eighteen cavities in lead frame strip 50 adjacent to connecting bar 56a (shown within dashed line B, note that lead frame strip 50 has columns of packages nine rows deep).
Accordingly, improved techniques and method of packaging ICs, such as MLPs 10, are desirable.